Freescale Semiconductor /MKL05Z4 /ADC0 /SC2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SC2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)REFSEL 0 (0)DMAEN 0 (0)ACREN 0 (0)ACFGT 0 (0)ACFE 0 (0)ADTRG 0 (0)ADACT

ADTRG=0, ADACT=0, ACFE=0, ACFGT=0, ACREN=0, DMAEN=0, REFSEL=00

Description

Status and Control Register 2

Fields

REFSEL

Voltage Reference Selection

0 (00): Default voltage reference pin pair, that is, external pins VREFH and VREFL

1 (01): Alternate reference pair, that is, VALTH and VALTL . This pair may be additional external pins or internal sources depending on the MCU configuration. See the chip configuration information for details specific to this MCU

DMAEN

DMA Enable

0 (0): DMA is disabled.

1 (1): DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event noted when any of the SC1n[COCO] flags is asserted.

ACREN

Compare Function Range Enable

0 (0): Range function disabled. Only CV1 is compared.

1 (1): Range function enabled. Both CV1 and CV2 are compared.

ACFGT

Compare Function Greater Than Enable

0 (0): Configures less than threshold, outside range not inclusive and inside range not inclusive; functionality based on the values placed in CV1 and CV2.

1 (1): Configures greater than or equal to threshold, outside and inside ranges inclusive; functionality based on the values placed in CV1 and CV2.

ACFE

Compare Function Enable

0 (0): Compare function disabled.

1 (1): Compare function enabled.

ADTRG

Conversion Trigger Select

0 (0): Software trigger selected.

1 (1): Hardware trigger selected.

ADACT

Conversion Active

0 (0): Conversion not in progress.

1 (1): Conversion in progress.

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